Add Haswell AVX instructions
Reported by Peter Johnson | June 25th, 2011 @ 09:52 PM | in 1.2.0 (closed)
rev11 of http://www.intel.com/software/avx adds a number of new instructions.
Comments and changes to this ticket
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Peter Johnson July 3rd, 2011 @ 10:59 PM
(from [47f693fd89b5d961e7097674c21263060299b10c]) Add Intel BMI1, BMI2, INVPCID, LZCNT instructions.
Reference: http://www.intel.com/software/avx rev11 spec
Also add appropriate CPU bits and directive handling for these.
Currently we have no good way of handling an "or" of instruction bits
(in this case needed for LZCNT, where it's either AMD or LZCNT). For now, make it LZCNT only.Contributed by: Mark Charney mark.charney@intel.com
Part of [#227].
https://github.com/yasm/yasm/commit/47f693fd89b5d961e7097674c212630... -
Peter Johnson July 3rd, 2011 @ 10:59 PM
(from [d779fcb04e7b47b6054483a498ec3ad77428bb24]) Add most Intel AVX2 instructions.
Reference: http://www.intel.com/software/avx rev11 spec
This is all AVX2 instructions except for VGATHER/VPGATHER, which
require additional ModRM handling.Portions contributed by: Mark Charney mark.charney@intel.com
Part of [#227].
https://github.com/yasm/yasm/commit/d779fcb04e7b47b6054483a498ec3ad... -
Peter Johnson July 4th, 2011 @ 02:55 AM
- → State changed from “new” to “resolved”
(from [ab721f347d281a430b4fe19cb2025151bcb7ef8a]) Add AVX2 VGATHER and VPGATHER instructions.
These instructions use "VSIB" encoding, which takes the place of the
usual SIB encoding. Several tests cover various legal and illegal
modes.Last part of [#227 state:resolved].
https://github.com/yasm/yasm/commit/ab721f347d281a430b4fe19cb202515...
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