Bug in compiling AVX instruction
Reported by Peter Johnson | June 28th, 2011 @ 06:40 AM
Originally posted on Trac by yin@absoft.com
Original
Trac Ticket
Description
We used yasm(HEAD) against AVX instructions. We found yasm
reported
error: invalid combination of opcode and operands on some
instructions. For
example:
vmovsd 22152(%rax),%xmm5,%xmm5 # [0]
id:1373 V+0x0
vmovsd 22152(%rcx),%xmm0,%xmm0 # [1]
id:1372 U+0x0
vmovsd 8(%r12),%xmm6,%xmm6 # [2] id:1374 F+0x0
vmovhpd 22160(%rcx),%xmm0,%xmm0 # [3]
id:1372 U+0x0
leaq .rodata(%rip),%r13 # [4]
vmovhpd 16(%r12),%xmm6,%xmm6 # [4]
id:1374 F+0x0
vmovhpd 22160(%rax),%xmm5,%xmm5 # [5]
id:1373 V+0x0
yasm will report error on line 1, 2, 3 but not give error on
line 4, 6, 7.
I believe vmovsd need a small update to support 22152(%rax) this
kind
of format, just like vmovhpd does.
Trac Attachments
h3. Trac Comments
comment:1
Changed 23 hours ago by peter@tortall.net
No, this case ("vmovsd mem, xmm, xmm") is not a legal instruction per the latest Intel instruction set reference (www.intel.com/products/processor/manuals/). The only listed 3-operand vmovsd forms have 3 xmm registers.
Yasm's behavior on this also matches GNU as behavior.
Comments and changes to this ticket
-
Peter Johnson June 28th, 2011 @ 06:41 AM
- → State changed from “new” to “invalid”
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