#123 ✓resolved
Peter Johnson

[Win64] Allow ADDR64 relocation

Reported by Peter Johnson | June 25th, 2011 @ 07:50 PM

Originally posted on Trac by Yvan AMILIN
Original Trac Ticket

  Description

It would be great to have an option to force ADDR64 relocation under Win64.

Consider the following example:

BITS 64
section .text
foo:
        mov rax, [8*rcx + .label]
.label:
        ret

VS 2005 SP1 fail to link with /LARGEADDRESSAWARE:YES because yasm generates ADDR32 relocation of .label. VS 2005 used to link without problem (maybe a linker bug corrected in SP1)

Trac Attachments

h3. Trac Comments
comment:1

                      follow-up:
  ↓ 2

              Changed 4 years ago by peter@tortall.net


Yasm does support generating ADDR64 relocations.  However, to get an ADDR64 relocation, you need a 64-bit offset value, which you cannot obtain with "[8*rcx+.label]".  64-bit absolute relocations are only available with non-register loads, and must be explicitly specified.

mov rax, [qword .label]

Generates an ADDR64 relocation.

      comment:1
    
                          follow-up:
      ↓ 2
                  
                  Changed 4 years ago by peter@tortall.net

      Status
        changed from new to closed
    
      Resolution
        set to worksforme

Yasm does support generating ADDR64 relocations.  However, to get an ADDR64 relocation, you need a 64-bit offset value, which you cannot obtain with "[8*rcx+.label]".  64-bit absolute relocations are only available with non-register loads, and must be explicitly specified.

mov rax, [qword .label]

Generates an ADDR64 relocation.

      Status
        changed from new to closed
    
      Resolution
        set to worksforme

comment:2

                    in reply to:
  ↑ 1
                    ;
                      follow-up:
  ↓ 3

              Changed 4 years ago by anonymous


Thanks. It works with x86 registers but not with rXX, with

 mov r10, [qword .label]

yasm generates "invalid combination of opcode and operands". 
Is it a normal behavior ?

comment:3

                    in reply to:
  ↑ 2

              Changed 4 years ago by Yvan AMILIN


ERRATA:
In fact, in just works with rax.

comment:4

              Changed 4 years ago by peter@tortall.net


Sorry, I should have been more precise.  The only instruction that supports full 64-bit immediate memory offsets are "mov rax, [qword foo]" and "mov [qword foo], rax".  64-bit immediate moves, on the other hand, can be used with any 64-bit register.  E.g. "mov rbx, qword foo".  This is not a yasm limitation; it's an AMD64 architecture limitation.

Comments and changes to this ticket

Please Sign in or create a free account to add a new ticket.

With your very own profile, you can contribute to projects, track your activity, watch tickets, receive and update tickets through your email and much more.

New-ticket Create new ticket

Create your profile

Help contribute to this project by taking a few moments to create your personal profile. Create your profile ยป

The Yasm Modular Assembler Project

Shared Ticket Bins

People watching this ticket

Pages